Mentor Graphics HyperLynx VX.2.6 Carck 破解版

Mentor Graphics HyperLynx VX.2.6 Carck 破解版

Mentor Graphics公司(纳斯达克代码:MENT)今日宣布推出最新版 HyperLynx®,该版本将信号和电源完整性分析、三维电磁解析和快速规则检查集成到一个统一的环境中。基于备受欢迎的 HyperLynx 信号完整性/电源完整性 (SI/PI) 应用程序,该产品首次为设计师提供一套完整的分析技术,让其能够进行任何类型的高速数字印刷电路板 (PCB)设计工作。该版本 HyperLynx 提供广泛的底层仿真引擎和能够让用户进行快速/交互式且完善的批处理模式分析的图形用户界面 (GUI),树立了在一个简单易用的环境中部署高速功能的新标准。

“我们已部署“左移”策略,即在设计流程早期阶段进行仿真,以便实现‘第一次就正确的’产品,”荷兰 Sintecs BV总裁 Hans Klos 说道,“凭借此新的、统一的 HyperLynx 环境,我们可以在一个流程中完成所有工作,这给我们带来巨大的好处”。

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准确的高性能仿真器 –在同一环境中实现

高速 PCB 在尺寸、层数、布线密度、信号传输速度、所使用的硅类型和供电挑战上存在非常大的差异。对于单个 EDA 供应商提供的大多数工具集,在处理不同类型的分析时,通常要求切换应用和用户界面。如今,HyperLynx 工具可在一个应用中提供2D/3D和电源完整性分析,且使用相同的用户界面。用户可在前一分钟仿真一个关键 SERDES 通道,然后下一分钟(通过选择一个新的菜单项)切换到一个大型电源网络的去耦分析。

Mentor 对 HyperLynx 分析技术注入了大量投资,尤其是互连建模方面。该产品现将超高速几何提取引擎和高级材料建模(宽带电解质、铜的粗糙度等)相结合,以便进行高度准确的仿真。

“该版本的HyperLynx是 Mentor 在高速工具方面的大量投资收获的巅峰之作,”Mentor Graphics 系统设计部副总裁兼总经理 A.J. Incorvaia 说道,“HyperLynx 很长时间以来是行业内广泛使用的高速工具。现在它已成为最强大并且集成效果最佳的高速工具。设计师要是还认为 HyperLynx 只是原来那个“快速易用的 SI”,那就得重新审视该产品,因为其改进幅度超乎想象。”

迎接新技术的挑战

SERDES 技术的采纳极大增加了数字信号传输使用的频率,即便像第三代 PCIe 这样的“主流”协议都能以 8 Gb/s 的速度高速运作。新版 HyperLynx 提供了高级的电磁解析器(包括全波3D),可让用户紧跟日益快速的 SERDES 技术的步伐。3D引擎是深度集成的,因此用户不用学习全波解析器环境中纷繁复杂的内容。该集成可确保通过信号和电源几何结构,生成电磁 (EM) 端口,运行仿真,得到 S 参数结果并整合到时域仿真,而所有这些都是自动完成的。

新版 HyperLynx 添加了多个引擎:两个 2.5D解析器、行业中最快速的 DC/IR 压降仿真器和一个快速准静态3D解析器,以便提供一套完整的电源完整性功能,这些功能与 HyperLynx 的信号完整性功能在同一个应用中提供。第二个更为高级的2.5D解析器能够进行纯电源和信号/电源混合建模,怀疑存在同步开关噪声 (SSN) 时其可用于增加 SI 仿真的精度。

简化整个电路板范围内的分析

仿真 PCB 信号布线和供电的每个细节需要付出巨大努力。通过从原始的仿真功能转换到标准接口和协议(如 DDRx 内存和 100 Gb/s 以太网 SERDES)的特殊要求,可减轻用户负担并针对所有接口提供简化的、汇总性的通过/失败判断。HyperLynx 的 DDRx 内存接口向导率先提供了简易设置、自动化的总线仿真和结果报告整合功能,而且现在已扩展到 DDR4 和 LPDDR4 接口。基于 HTML 的报告使得用户可以创建设计文档以及进行内部基于 Web 的结果“发表”。

在 SERDES 领域中,支持 Channel Operating Margin (COM) 的协议允许基于一套特定、复杂的仿真步骤对每个通道进行单次/指定失败次数的链接质量检查。新版 HyperLynx 工具提供行业内首次针对 100GbE 信号传输的 COM 协议商业实现,且仿真细节全自动化生成。

除了保持其易于使用和快速的交互式分析优点外,该款更为可靠的 HyperLynx 可高效处理超大布局(包括超深叠层、庞大网络数量和整个多板系统),提升了多处理器和其他仿真引擎性能,以及提供缓存和复用所提取的模型。

利用工具、流程和培训

除了改善产品之外,Mentor 通过与行业专家 Eric Bogatin 合作的系列全球培训研讨会,培养设计师处理各种新出现的挑战的能力。该系列研讨会将讨论新的高速技术以及有效采用这些技术的最先进的方法、工具和流程。

“当达到 28 Gbps 或更高速度时,没有什么是可以忽视的,并且设计师必须懂得将物理设计与超高速流状态下的电气性能相结合的重要信号完整性原则。要满足下一代产品的要求,设计师必须加快学习进度才能获得成功,”博尔德科罗拉多大学 ECEE 副教授兼 Teledyne LeCroy Front Range 信号完整性实验室负责人 Eric Bogatin 博士说道。“一个最高效学习和理解重要设计原理的方式是使用像 Mentor Graphics HyperLynx 这样的仿真工具探索虚拟原型,极大地提高学习效率。”


Mentor Graphics HyperLynx VX.2.6 | 3.7 Gb

Mentor Graphics announced the new release HyperLynx VX.2.6. The latest release address the increasing complexity of today’s advanced system designs through an emphasis on both ease-of-use and team productivity.

What’s new in HyperLynx VX.2.6 – Date: September 2019

Note: The following is a condensed summary of the HyperLynx release highlights.

Optimize PDN Decoupling
The HyperLynx Decoupling Optimizer lets you improve the performance of your design’s Power Distribution Network (PDN) while reducing component count and costs. It analyzes your design based on an impedance target using several different strategies, allowing you to pick the solution that best meets your unique design needs.

Enhanced Power-aware Analysis
Power Distribution Networks (PDNs) interact with high speed signals, reducing design margins. Power-Aware simulations with HyperLynx accurately model voltage compression (SSN) at the driving device’s I/O power rail and the behavior of high speed signals including their return paths (instead of idealizing return path behavior, as most SI tools do). Automated 3D EM extraction of your design for Power-Aware analysis is now more automated and easier than ever.

Automated Post-Route 3D EM Extraction
Highly accurate post-route simulation of PCB designs is a balancing act. Modeling whole nets with an 3D EM solver requires huge amounts of memory and compute power, even though most of the net can be accurately and efficiently with standard methods. The trick is modeling just the discontinuities with 3D EM and correctly integrating those models with standard models for everything else. HyperLynx post-route 3D EM automatically identifies areas that require 3D EM analysis, solves them and creates models with the whole net, accurately accounting for any trace segment included in the 3D EM model. There’s no easier or faster way to perform highly accurate post-route analysis.

Optimize Interconnect with 3D EM
HyperLynx 3D Explorer lets you sweep design geometries and model behavior through 3D EM simulation to create a structure that meets your design’s electrical performance needs. Optimize via transitions, component fanout, blocking capacitor layout and more. 3D Explorer lets you start from a library of preconfigured templates or create your own projects from PCB layout.

Modeling PCB Parasitics for Analog / Mixed-Signal Simulation
PCB parasitics can be a crucial factor in modern analog / mixed-signal designs, but their effects on circuit behavior are usually ignored during design simulations. This can result in designs that miss their performance targets or have to be manually tuned after manufacture. Integration between Xpedition AMS and HyperLynx Advanced 3D EM Solvers allows PCB parasitics to be accurately modeled and included in AMS simulations before PCB fabout, so that design adjustments can be made quickly and accurately, greatly increasing chances of first pass design success.

Electrical Rule Checks: Rigid-Flex and Wirebonds
It’s easy to make design mistakes when only part of the interconnect is checked for electrical rule compliance. HyperLynx DRC checks designs for compliance with electrical, physical and standards compliance-based rules, all the way to the die pad. Rules can be checked across the whole length of a rigid flex assembly as well.

Touchstone Viewer Enhancements
S-parameter files are a great way to accurately model frequency-dependent behavior, but their data-oriented, frequency-domain based nature can make it hard to understand how the design actually behaves – most system designers don’t naturally think in the frequency domain. The HyperLynx Touchstone viewer can automatically identify and display through-path behavior in a S-parameter network. It can also identify all port pairs that have signal coupling above a user-specified threshold, making it easy to spot problem areas for closer study.

Mentor Graphics HyperLynx offers a complete suite of design analysis and verification software that meets the needs of PCB engineers at any point in the board design flow. Easy to use and integrate into your flow, HyperLynx equips hardware design engineers and PCB designers to efficiently analyze, identify, resolve, and verify critical design issues, which prevents costly re-spins, reduces design cycle times, and improves product reliability. Achieve greater innovation, faster time-to-market, and decreased costs with HyperLynx.

HyperLynx PCB Analysis Software has grown to become a comprehensive product line of tools that includes advanced SERDES channel analysis, AC and DC Power Integrity, Full DDRx Signoff Verification, Electrical Design Rule Checking, and Full-Wave 3D Electromagnetics for model generation of discontinuities. HyperLynx has become the best solution for SI, PI, thermal, and 3D EM simulation and analysis widely used by electrical engineers and PCB layout designers around the world.

Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products and is the only EDA company with an embedded software solution.

Product: Mentor Graphics HyperLynx
Version: VX.2.6 Build 14488140
Supported Architectures: x64
Website Home Page : http://www.mentor.com
Language: english
System Requirements: PC *
Supported Operating Systems: *
Size: 3.7 Gb

 

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